1. Field of the Invention
The present invention extends memory capacity of a microprocessor while permitting the software writer to access any blocks of externally stored information by addressing the internal memory blocks of the microprocessor.
2. Prior Art
Prior art techniques are known for extending the memory capacity of a microprocessor by incorporating external memory without appreciably disturbing the conventional rules for writing software.
The first of these techniques uses chip select or bank memory lines, to assist in extended addressing, and the second additionally employs address translation, using polarity grouping and logic in the address lines.
A typical prior art microprocessor may have a 65,536 (generally called 64K) address memory divided into locations for eight 8K blocks of address memory, numbered 0-7. Three Address lines A13, A14, and A15 are required to obtain the 8K block resolution, and thirteen (A0-A12) additional address lines resolve the 65,536 addresses or locations of the eight 8K blocks. If 4K resolution is desired, address lines A12-A15 may be designated to provide additional addressing capability.
Various combinations of logic circuits on an external chip are required to extend this addressing to external memory. However, these are all hard wired circuits which cannot be programmable or changed by the programmer.
As many as 11 logic exclusive OR circuits, inverters, and NAND circuits have been employed in various combinations of the address lines to accommodate the addressing of external memories from a single microprocessor. These are fixed for the life of the microprocessor, and offer little flexibility.